Thomas Tran
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Memory-Mapped I/O Implementation
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Project Overview
This project explores Memory-Mapped I/O (MMIO) interfaces, a fundamental concept in embedded systems. I implemented a custom MMIO system connecting an STM32 microcontroller to a GOWIN FPGA, allowing the microcontroller to directly read push buttons and control LEDs on the FPGA through memory access operations.
The project demonstrates how standard memory read/write operations can be used to interact with external hardware, bridging the gap between software and hardware interfaces in embedded system design.
MMIO Concepts
Memory-Mapped I/O is a technique where hardware devices are mapped to specific memory addresses, allowing the CPU to communicate with peripherals using standard memory access instructions.
In this project:
- The STM32’s Flexible Memory Controller (FMC) is configured to interface with the FPGA
- The FPGA implements custom memory registers to store and retrieve data
- Memory transactions (reads/writes) are transmitted over a parallel bus interface
- D-latches and tri-state buffers are used to implement the memory-mapped registers
Memory-Mapped I/O allows peripherals to be accessed through memory addresses
Implementation Details
The implementation involves both hardware design (Verilog HDL) and software (C code) components:
Hardware Components
- GOWIN FPGA - Implements the memory registers and I/O interfaces
- STM32 Nucleo - Provides the processor and memory controller
- Custom Interposer PCB - Connects the FPGA and microcontroller
Software Elements
- STM32 FMC Configuration - Sets up the memory controller interface
- Memory Access Code - C code that reads/writes to memory-mapped addresses
- Verilog HDL - Implements the memory interface logic in the FPGA